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| SID3310 Elektronische Bauelemente -10A, -20V,RDS(ON)150m[ P-Channel Enhancement Mode Power Mos.FET RoHS Compliant Product Description The SID3310 provide the designer with the best combination of fast switching, ruggerized device device design, low on-resistance and cost -effectiveness. The TO-251 is universally preferred for all commercial-industrial surface mount applications and suited for low voltage applications such as DC/DC converters. 5.60.2 7.00.2 6.60.2 5.30.2 TO-251 2.30.1 0.50.05 1.20.3 Features * 2.5V Gate Drive Capability 7.00.2 0.750.15 * Simple Drive Requirement 0.60.1 2.3REF. 0.50.1 G D D S Dimensions in millimeters G S Absolute Maximum Ratings Parameter Drain-Source Voltage Gate-Source Voltage Continuous Drain Current,VGS@10V Continuous Drain Current,VGS@10V Pulsed Drain Current 1 Symbol VDS VGS ID@TC=25 C ID@TC= 100 C IDM PD@TC=25 C o o o Ratings -20 12 -10 -6.2 -24 25 0.01 Unit V V A A A W W/ C o o Total Power Dissipation Linear Derating Factor Operating Junction and Storage Temperature Range Tj, Tstg -55~+150 C Thermal Data Parameter Thermal Resistance Junction-case Thermal Resistance Junction-ambient Symbol Max. Max. Rthj-c Rthj-a Ratings 5.0 110 o Unit o C /W C /W ttp://www.SeCoSGmbH.com/ Any changing of specification will not be informed individual 01-Jun-2002 Rev. A Page 1 of 5 SID3310 Elektronische Bauelemente -10A, -20V,RDS(ON)150m[ P-Channel Enhancement Mode Power Mos.FET Electrical Characteristics( Tj=25 C Unless otherwise specified) Parameter Drain-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Gate Threshold Voltage Gate-Source Leakage Current Drain-Source Leakage Current (Tj=25 C ) Drain-Source Leakage Current(Tj=150C) Static Drain-Source On-Resistance o o o Symbol BVDSS BVDS/ Tj VGS(th) IGSS IDSS Min. - 20 _ Typ. _ - 0.1 _ _ _ _ _ _ Max. _ Unit V V/ C V nA uA uA o Test Condition VGS=0V, ID=-250uA Reference to 25 C, ID=-1mA VDS=VGS, ID=-250uA VGS=12V VDS=-20V,VGS=0 VDS=-16V,VGS=0 VGS=-4.5V, ID=-2.8A VGS=-2.5V, ID=-2 A o _ _ 100 -0.5 _ _ _ _ -1 -25 150 250 _ _ _ RDS(ON) Qg Qgs Qgd Td(ON) Tr Td(Off) Tf Ciss Coss Crss Gfs _ _ _ _ _ _ _ _ _ _ _ m [ Total Gate Charge2 Gate-Source Charge Gate-Drain ("Miller") Charge Turn-on Delay Time2 Rise Time Turn-off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Forward Transconductance 6 1.5 0.6 2.5 60 70 60 300 180 60 4.4 nC ID=- 2.8 A VDS=- 6V VGS=- 5V _ _ _ _ _ _ _ VDD=-6 V ID=-1A nS VGS=- 5V RG=6[ RD=6 [ pF VGS=0V VDS=-6V f=1.0MHz _ _ S VDS=- 5V, ID=-2.8A Source-Drain Diode Parameter Forward On Voltage 2 Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) 1 Symbol VSD IS Min. _ _ Typ. _ _ _ Max. -1.2 Unit V A A Test Condition IS=-10A,VGS=0V,Tj=25 C VD=VG=0V,VS=-1.2 o -10 -24 ISM _ Notes: 1.Pulse width limited by Max. junction temperature. 300us, dutycycleO2%. 2.Pulse widthO ttp://www.SeCoSGmbH.com/ Any changing of specification will not be informed individual 01-Jun-2002 Rev. A Page 2 of 5 SID3310 Elektronische Bauelemente -10A, -20V,RDS(ON)150m[ P-Channel Enhancement Mode Power Mos.FET Characteristics Curve Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics Fig 3. On-Resistance v.s. Gate Voltage Fig 4. Normalized On-Resistance v.s. Junction Temperature ttp://www.SeCoSGmbH.com/ Fig 5. Maximum Drain Current v.s. Case Temperature Fig 6. Type Power Dissipation Any changing of specification will not be informed individual 01-Jun-2002 Rev. A Page 3 of 5 SID3310 Elektronische Bauelemente -10A, -20V,RDS(ON)150m[ P-Channel Enhancement Mode Power Mos.FET Fig 7. Maximum Safe Operating Area Fig 8. Effective Transient Thermal Impedance Fig 9. Gate Charge Characteristics Fig 10. Typical Capacitance Characteristics Fig 11. Forward Characteristics of Reverse Diode ttp://www.SeCoSGmbH.com/ Fig 12. Gate Threshold Voltage v.s. Junction Temperature Any changing of specification will not be informed individual 01-Jun-2002 Rev. A Page 4 of 5 SID3310 Elektronische Bauelemente -10A, -20V,RDS(ON)150m[ P-Channel Enhancement Mode Power Mos.FET Fig 13. Switching Time Circuit Fig 14. Switching Time Waveform Fig 15. Gate Charge Circuit Fig 16. Gate Charge Waveform http://www.SeCoSGmbH.com/ 01-Jun-2002 Rev. A Any changing of specification will not be informed individual Page 5 of 5 |
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